I have also developed a 5 stage pipelined MIPS processor in C++. The processor will take 2 text file instruction memory and data memory as the input and execute the instructions based on the assembly read from the instruction memory file. The data memory can be as long as we want. I have also written the code such a way that it becomes very easy to debug. The processor would output the intermediate results of all the variables in a separate text file with the final register values .

The C++ code is uploaded on the github. Click on the Discover More button to access the code!