First line contact for validation issues in Atlanta Design Center

Develop, timing close, and debug FPGA system with implementation of the next generation of Synaptics family of high-speed serial interface devices.

Execute validation plan to test all required functionality of a product in both FPGA system and in ASIC.
Work with firmware team to develop and debug device drivers required for validation activities.

Implement FPGA logic in verilog and utilize FPGA macros as needed to translate ASIC rtl into FPGA
prototype platform using proprietary tools and using other vendor-supplied CAD tools.

Develop automated/scripted design flows for the above mentioned development processes.